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Dual digital transistor JSCJ UMG3N with two independent chips reducing interference and mounting area

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Dual digital transistor JSCJ UMG3N with two independent chips reducing interference and mounting area

Emitter-Base Voltage VEBO : 5V

Input Resistor : 4.7kΩ

Collector - Emitter Voltage VCEO : 50V

Description : Pre-Biased Bipolar Transistor (BJT) 50V 100mA 150mW Surface Mount SOT-353

Mfr. Part # : UMG3N

Model Number : UMG3N

Package : SOT-353

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UMG3N Dual Digital Transistors

The UMG3N is a compact dual digital transistor featuring two independent DTC143T chips in a single SOT-353 package. This configuration eliminates interference between transistor elements, significantly reducing mounting costs and area by half. It is compatible with SOT-353 automatic mounting machines.

Product Attributes

Brand: JIANGSU CHANGJING ELECTRONICS TECHNOLOGY CO., LTD
Marking: G3

Technical Specifications

Parameter	Symbol	Test Conditions	Min	Typ	Max	Unit
Breakdown Voltage	V(BR)CBO	IC=50A,IE=0	50			V
	V(BR)CEO	IC=1mA,IB=0	50			V
	V(BR)EBO	IE=50A,IC=0	5			V
Cut-off Current	ICBO	VCB=50V,IE=0		0.1	0.5	A
Cut-off Current	IEBO	VEB=4V,IC=0		0.1	0.5	A
DC Current Gain	hFE	VCE=5V,IC=1mA	100		600
Collector-Emitter Saturation Voltage	VCE(sat)	IC=5mA,IB=0.25mA			0.3	V
Transition Frequency	fT	VCE=10V,IE=-5mA, f=100MHz		250		MHz
Input Resistor	R1		3.29	4.7	6.11	K
Operating Temperature Range	TJ		-55		+150
Operating Temperature Range	Tstg		-55		+150
Collector Dissipation	PC	Ta=25			150	mW
Collector Dissipation	PD	Ta=25			150	mW

Package Outline Dimensions (SOT-353)

Symbol	Dimensions In Millimeters	Dimensions In Inches
A	0.900 - 1.100	0.035 - 0.043
A1	0.000 - 0.100	0.000 - 0.004
A2	0.900 - 1.000	0.035 - 0.039
b	0.150 - 0.350	0.006 - 0.014
c	0.100 - 0.150	0.004 - 0.006
D	2.000 - 2.200	0.079 - 0.087
E	1.150 - 1.350	0.045 - 0.053
E1	2.150 - 2.400	0.085 - 0.094
e	1.200 REF	0.047 REF
e1	1.200 - 1.400	0.047 - 0.055
L	0.650 TYP	0.026 TYP
L1	0.260 - 0.460	0.010 - 0.018
	0 - 8	0 - 8
	0.525 REF	0.021 REF

2410121908_JSCJ-UMG3N_C19268992.pdf

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